bus arbitration

基本解釋

• 總線判優(yōu)

英漢例句

雙語例句

• The complex programmable logic unit CPLD was applied in the design of the bus arbitration organization.
  在總線仲裁機(jī)構(gòu)設(shè)計中應(yīng)用了復(fù)雜可編程邏輯器件CPLD ，固化了和總線仲裁有關(guān)的總線邏輯關(guān)系。
• PC and DSP exchange data using high speed static RAM and bus arbitration circuit and corresponding handshake signal is designed to ensure the correct reading and writing RAM.
  PC與DSP的數(shù)據(jù)交換采用高速靜態(tài)RAM，并設(shè)計總線仲裁電路及相應(yīng)的握手信號，以保證PC與DSP雙方對RAM的正確讀寫。
• Realize the interface between PCI9054 and the PCI bus, including the bus arbitration, read and write of the registers, the configuration of the EEPROM, the DMA transfer, interrupt response and so on.
  實現(xiàn)PCI9054與計算機(jī)PCI總線的接口，包括總線仲裁，寄存器讀寫操作，EEPROM的配置和下載，DMA傳輸，中斷響應(yīng)等功能。

• bus arbitration更多例句

詞組短語

短語

• Bus request & Arbitration 總線請求和仲裁
• pci bus arbitration pci 總線仲裁
• polling bus arbitration 輪詢總線仲裁
• daisy chaining bus arbitration 菊式煉接總線仲裁
• Hidden bus arbitration 仲裁

• bus arbitration更多詞組

專業(yè)釋義

計算機(jī)科學(xué)技術(shù)

• 總線仲裁

  The scheduling policy of the bus arbitration unit was been analyzed and the I/O function of RTOS was partly implemented in hardware.
  本文在分析總線仲裁單元的時間片調(diào)度的基礎(chǔ)上，將操作系統(tǒng)的I／O管理的功能部分采用硬件實現(xiàn)。

• 判優(yōu)總線
• 總線調(diào)解
• 匯流排仲裁

電子、通信與自動控制技術(shù)

• 總線仲裁

  In addition, this paper changed the internal bus structure of ADSP2181 for a lot. "Bus Arbitration" and "Delay Operation" bus control strategy are adopted at same time, which will make the T2181 IP core more suitable for SOC integration.
  另外，在設(shè)計工程中，本文按照IP核設(shè)計原則對ADSP2181 DSP處理器內(nèi)部的總線結(jié)構(gòu)進(jìn)行了大范圍的改造，同時采用了“總線仲裁”和“延時操作”兩種控制機(jī)制，使設(shè)計的軟核T2181更適合于SOC集成。

• 總線總裁