prototype verification system

常見(jiàn)例句

Design circuit for SoC(System on Chip) design verification in FPGA prototype phase and product phase.
設(shè)計(jì)電路用于片上系統(tǒng)的設(shè)計(jì)驗(yàn)證，包括FPGA原型階段和產(chǎn)品階段。
To combine the verification with system design, a prototype of automatic verification tool for UML sequence diagrams has been designed and developed.
我們將驗(yàn)證工作與系統(tǒng)設(shè)計(jì)結(jié)合起來(lái)，設(shè)計(jì)和開(kāi)發(fā)了針對(duì)UML順序圖的自動(dòng)驗(yàn)證工具原型。
Experiments concerning the verification of the mathematical model, calibration of the sensing and measuring system, and field applications are carried out on the basis of the prototype.
在研制出樣機(jī)的基礎(chǔ)上，對(duì)數(shù)學(xué)模型的驗(yàn)證，起重傳感器測(cè)量系統(tǒng)的標(biāo)定，以及現(xiàn)場(chǎng)測(cè)試等方面進(jìn)行了全面系統(tǒng)的實(shí)驗(yàn)研究。