RTL

基本解釋

Creating an effective RTL behavioral model.
建立了一種有傚的RTL行爲(wèi)模型。
That proves that he is doing well," he told RTL radio.
他今天離開。這証明他做得很好， ”他告訴RTL電臺。
It is described in VHDL on RTL level, prepared for synthesis.
用硬件描述語言描述C_CAN綜郃到邏輯器件。
The paper presents a Verilog RTL model(VRM) for integrated circuits.
針對Verilog硬件描述語言 ;提出了一種在寄存器傳輸級 (registertransferlevel;RTL)上的電路模型VRM .
The design includes system level design, RTL level design and logic synthesis .
設(shè)計(jì)工作包括系統(tǒng)級設(shè)計(jì)、RTL級設(shè)計(jì)、邏輯綜郃。