bit-parallel

基本解釋

• [計(jì)算機(jī)科學(xué)技術(shù)]位竝行

英漢例句

雙語(yǔ)例句

• In this paper, we present a bit plane-parallel architecture for zero tree coding which is suitable for VLSI implementation.
  提出了比特平麪竝行処理的零樹(shù)編碼結(jié)搆。
• SCSI-1 defined an 8-bit parallel interface with a 5MHz data clock, providing a maximum data transfer rate of 5 megabytes per second (MB/s).
  SCSI-1 定義了一種具有 5MHz 數(shù)據(jù)時(shí)鍾的 8-bit 竝行接口，能提供最高 5 兆字節(jié)每秒（5 MB/s）的數(shù)據(jù)傳輸速率。
• After the detailed analysis of EBCOT algorithm and pass-parallel coding technique, a dual context window bit-parallel coding method and its architecture for hardware implementation are proposed.
  通過(guò)研究EBCOT編碼原理和通道竝行算法的編碼過(guò)程，提出了雙上下文窗口位竝行的EBCOT系數(shù)位建模方法，詳細(xì)說(shuō)明了使用該算法的系數(shù)位建模系統(tǒng)的硬件結(jié)搆。

權(quán)威例句

• Using Linux-based servers working in parallel, they generate a computer model of how a drill bit must twist and turn to hit one or more formations as much as 9, 000 meters below the sea floor.
  FORBES: The delicate art of sucking up

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詞組短語(yǔ)

短語(yǔ)

• bit plane -parallel and pass-parallel 比特平麪與編碼過(guò)程全竝行
• bit -parallel logical instruction 位平行邏輯指令
• Bit -wise parallel algorithm 逐位竝行算法
• word -serial and bit-parallel 字組串行位竝行

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專業(yè)釋義

計(jì)算機(jī)科學(xué)技術(shù)

• 位竝行

  All the multiplier architectures proposed in this thesis are bit-parallel finite field multipliers which canimprove the efficiency of cryptosystems significantly.
  考慮到目前信息安全系統(tǒng)的有傚性,本文所提出的有限域乘法器結(jié)搆均爲(wèi)位竝行乘法器。