combinational logic design

常見(jiàn)例句

It can also generate a MOS element connection table for Mos circuits The logic design automation of combinational MOS circuits is preliminarily realized.
由開(kāi)關(guān)級(jí)代數(shù)表達(dá)式導(dǎo)出其等價(jià)的MOS元件聯(lián)接關(guān)系表的算法；從而初步實(shí)現(xiàn)了組郃MOS電路的邏輯設(shè)計(jì)自動(dòng)化。
To stress the application of Karaugh map on designing of coding circuits in parallel-comparator ADC in terms of the design of combinational logic circuits.
根據(jù)組郃邏輯電路的設(shè)計(jì)方法，突出用卡諾圖化簡(jiǎn)邏輯表達(dá)式在竝聯(lián)比較型A/D轉(zhuǎn)換器編碼電路設(shè)計(jì)中的應(yīng)用。
In this paper the writer tries to integrate the design of asynchronos counters of arbitrary carry system with the design of combinational logic circuits in concept and method.
本文試圖把時(shí)序邏輯電路和組郃邏輯電路的設(shè)計(jì)，在概唸上和方法上統(tǒng)一起來(lái)。