low voltage differential signaling

基本解釋

Low Voltage Differential Signaling (LVDS), a high speed I/O interface, is one important research problem of recent CMOS circuit design.
低電壓差分信號（LVDS）高速I/O接口單元儅前CMOS電路設(shè)計中的重要研究課題。
The sensor has 32 10-bit digital Low Voltage Differential Signaling (LVDS) outputs that enable transfer of image data over a standard industry protocol at low power and low noise.
該傳感器有32個10位數(shù)字低電壓差分信號傳輸（LVDS）輸出，使超過1在低功耗和低噪音標準工業(yè)協(xié)議的圖像數(shù)據(jù)傳輸。
To further improve the high-speed data processing capabilities in optical network nodes, this thesis has studied the low voltage differential signaling (LVDS) technology.
LVDS技術(shù)的核心是採用了極低的電壓幅度高速差分的傳輸數(shù)據(jù)，能夠?qū)崿F(xiàn)點對點或一點對多點的連接。