memory cell array

基本解釋

The invention discloses a memory cell array arranged multiple in rows and lines.
本發(fā)明公開(kāi)了存儲(chǔ)器單元陣列，以多行與多列排列。
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In a memory cell array, a plurality of memory cells having ferroelectric capacitors amplifies the potential of the bit lines of each memory cell.
半導(dǎo)躰存儲(chǔ)裝置。在存儲(chǔ)單元陣列中設(shè)置具有鉄電電容器的多個(gè)存儲(chǔ)單元。多個(gè)檢測(cè)放大器電路使各存儲(chǔ)單元的位線的電位放大。
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Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.
實(shí)施例包括個(gè)別存儲(chǔ)單元、這種存儲(chǔ)單元的陣列、操作所述存儲(chǔ)單元或所述存儲(chǔ)單元陣列的方法、以及其制造方法。