successive approximation adc

基本解釋

The IP core contains a Successive Approximation ADC and interface control circuit.
該IP核由逐次逼近型模數(shù)轉(zhuǎn)換器以及控制接口電路所搆成。
Successive approximation register ADC (SAR ADC) has been widely used as its low-power, high-resolution, high accuracy, as well as small size.
其中逐次逼近型模數(shù)轉(zhuǎn)換器（SAR ADC）由於其低功耗、高分辨率、高精度以及小尺寸等優(yōu)點一直被廣泛應(yīng)用。
For this purpose, a column-level 5-bit successive approximation ADC is designed and it is integrated in column signal processing circuit of CMOS active pixel sensors.
設(shè)計了一個可以集成在CMOS有源像素傳感器列信號処理電路中的5位逐次逼近型模數(shù)轉(zhuǎn)換器。