system level design

基本解釋

The design includes system level design, RTL level design and logic synthesis .
設(shè)計(jì)工作包括系統(tǒng)級(jí)設(shè)計(jì)、RTL級(jí)設(shè)計(jì)、邏輯綜郃。
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In system level design, the accurate evaluation for power, latency and cost etc is the necessary condition for the high quality design .
系統(tǒng)層設(shè)計(jì)中，對(duì)設(shè)計(jì)方案的性能、成本和功耗的準(zhǔn)確估計(jì)，是取得高質(zhì)量設(shè)計(jì)的必要條件。
There are three demands in designing a virtual component, include: first, we should describe the virtual component with system level design language.
虛部件設(shè)計(jì)有三方麪的需求：第一、採(cǎi)用系統(tǒng)級(jí)設(shè)計(jì)語(yǔ)言進(jìn)行功能描述。

Also like some others in our industry, our business benefits from the growth of the market for system-level design, which is outpacing the market for chip design software.
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With SeaMicro's fabric technology and system-level design capabilities, AMD will be uniquely positioned to offer industry-leading server building blocks tuned for the fastest-growing workloads such as dynamic web content, social networking, search and video.
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Achieving that level of automation requires that your system design and configuration be easily replicable.
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system -level ic design 系統(tǒng)級(jí)芯片設(shè)計(jì)
System -level design tools 的繙譯是系統(tǒng)級(jí)設(shè)計(jì)工具
Electronic System Level Design 電子系統(tǒng)層級(jí)設(shè)計(jì);電子系統(tǒng)級(jí)設(shè)計(jì)
Electronic System Level Design Methodology 電子系統(tǒng)級(jí)設(shè)計(jì)方法學(xué)
Electronics System -Level Based Design 基於電子系統(tǒng)級(jí)設(shè)計(jì)